Digital Design Verification Engineer

Dresden, Grenoble, Milan

Full-time

Permanent employee

Role Overview

Design Verification Engineer with expertise in System Verilog, UVM methodology.
Experience in ASIC-Memory Design methodology.
DDR protocol knowledge is preferable.
This engineer shall collaborate with architects and designers to meet performance and reliability requirements.
Mixed signal verification.

Must Have

Master’s degree in Electrical Engineering, Computer Engineering.
5+ years of experience in ASIC/DRAM/NAND/NOR Memory design verification
Strong skills in SystemVerilog and UVM methodology.
Cadence tool chain knowledge (Virtuoso, ADE, Xcelium, Simvision) or equivalent Synopsys verification tool chain.
Problem Solving and Communication skills.

Responsibilities

Develop and maintain UVM-based verification environments.
Create test plans, testbench and stimuli.
Create analogue blocks and memory models.
Execute both block and system levels verification.
Simulate and debug using Cadence/Synopsys tools for design inspection.
Verify and validate DDR4/DDR5 command user interface of the memory.
Verify and validate internal Memory core.
RTL coverage and gate level simulation with SDF back-annotation for timing closure checks.
Run regression tests reporting results to design engineer.
Collaborate with design engineers.

Your profile

Master’s degree in Electrical Engineering, Computer Engineering.
5+ years of experience in ASIC/DRAM/NAND/NOR Memory design verification
Strong skills in SystemVerilog and UVM methodology
Experience in DDR4, LPDDR4/5, or DDR5 is preferrable.
Cadence tool chain knowledge (Virtuoso, ADE, Xcelium, Simvision) or equivalent Synopsys verification tool chain.

Ideal fit

Asic design and mixed signal verification knowledge preferably in memory design
System Verilog and UVM methodology experience.
Cadence verification tool chain experience (Virtuoso Schematic Entry, ADE, Xcelium, Simvision)
Programming and scripting skill (linux commands, tcl, python)
Problem solving attitude.

Über uns

Die Ferroelectric Memory GmbH (FMC) ist ein innovatives Halbleiterunternehmen mit Sitz in Dresden, Deutschland, das sich auf nichtflüchtige Speichertechnologien der nächsten Generation spezialisiert hat.

Gegründet im Jahr 2016, steht FMC an der Spitze der Innovation im Bereich ferroelektrischer Speicher und ermöglicht schnellere, energieeffizientere und skalierbare Lösungen für zukünftige Computersysteme.

Unser Team vereint umfassende Expertise in Halbleiterphysik, Device Engineering und Systemdesign, um Speicherarchitekturen für neue Anwendungen in den Bereichen KI, IoT und Hochleistungsrechnen neu zu definieren.

Werden Sie Teil unseres Teams und gestalten Sie die Zukunft der Speichertechnologie aktiv mit.

Warum FMC?

Modernste Speichertechnologie
Starke Präsenz im Dresdner Halbleiter-Ökosystem
Hohe Eigenverantwortung und wirkungsorientierte Positionen
Internationales und kooperatives Team
Direkter Beitrag zu KI und Computing der nächsten Generation